Teradyne Introduces Near-DUT Test Platform for LPDDR6, DDR6 and GDDR7

The Magnum E2 system supports emerging DRAM and NAND interfaces while using common hardware and software from engineering qualification through volume production.
Teradyne has introduced Magnum E2, a high-speed semiconductor test system designed for emerging memory interfaces including LPDDR6, DDR6, GDDR7 and NAND flash.
The platform is based on Teradyne’s Near-DUT Test architecture, which places digital test instrumentation close to the device under test. Reducing the physical distance between the instrument and the memory device is intended to limit high-frequency signal degradation and preserve timing margin as memory interfaces move to higher data rates.
Magnum E2 supports NRZ, PAM3 and PAM4 signalling through a programmable algorithmic pattern-generation architecture. PAM3 is becoming particularly important as memory manufacturers seek higher transfer rates without all the signal-integrity and power penalties associated with a direct transition to four-level signalling.
The system is designed for both engineering and production configurations. Teradyne says customers can use a common hardware and software platform for device qualification and subsequent high-volume manufacturing, reducing the need to transfer test programmes between unrelated systems.
Higher pin counts and greater test parallelism are becoming critical as memory devices adopt wider interfaces and more complex packages. These requirements are being driven partly by AI accelerators and high-performance computing systems, where memory bandwidth and reliability can be as important as the performance of the processor itself.
Teradyne has also incorporated logic-test capability into Magnum E2. This allows the same platform to address products that combine memory and logic functions and may enable manufacturers to consolidate test stages that previously required separate equipment.
The company has not announced customer deployments or detailed throughput figures. Magnum E2 will be presented publicly at SEMICON West in San Francisco from 13 to 15 October.

Image credit: Teradyne