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Imec Reports World-Class Low-Power IP Blocks for 5G

Today, at its Imec Technology Forum Southeast Asia in Singapore, imec, the world-leading research and innovation hub in nano-electronics and digital technology, will present two key building blocks for future 5G applications featuring record low power consumption. The first is a fast and extremely compact successive approximation analog-to-digital converter (SAR ADC), designed for consumer electronics, such as mobile phones, operating in the below-6GHz frequency bands (4G/5G). Secondly, imec developed a 60GHz front-end with radio frequency (RF) phase shifting and on-chip transmit-receive switching, targeting 5G fixed wireless access and small cell backhaul applications. These building blocks are available to interested companies by joining imec’s industrial affiliation program, or through IP licensing.

5G mobile networks, promise massive connectivity through much higher data rates, lower latency and lower battery consumption than current 4G standards. To realize this, frequencies below 6GHz and also millimeter-wave frequencies, especially at the 57-66GHz unlicensed band, are explored, promising speeds of multi-Gb/s with low latency.

“Imec is developing novel IP building blocks for 5G, operating below-6GHz as well as in the 60GHz frequency band,” stated Wim Van Thillo, program director perceptive systems at imec. “Our portfolio includes record-breaking analog-to-digital convertors (ADCs), reconfigurable low-noise frequency synthesizers, millimeter-wave phased array transceivers, antenna modules and more. These building blocks show state-of-the art performance, excel in low-power operation and are low cost by leveraging scaled CMOS technologies. They give our partners a unique advantage in realizing their next-generation SoC for 5G wireless communication”

Targeting smartphone applications in the below-6GHz band, imec has developed a compact, low-cost, low-power and high-speed (300Ms/s) ADC that meets the requirements of multimode multiband 5G communication. The ADC is a SAR with a reduced core area of only 350µmx 325µm which is fabricated in 16nm CMOS. It achieves a dynamic low power consumption of only 3.6mW at 300Ms/s and low-frequency signal to noise and distortion ratio (SNDR) of 70.2dB at 204MS/s.

Imec also developed a compact, energy efficient and low-cost radio front-end (TRX) that operates at 60GHz. The chip features 8-way calibration-free beamforming at RF frequencies to support a large number of antennas, making the technology attractive for fixed wireless access and small cell backhaul. The on-chip transmit-receive switching allows to share the antenna array between transmit and receive mode. The 9.6mm2 chip is implemented in 28nm CMOS and consumes 231mW in receive and 508mW in transmit mode (0.9V supply).

SAR-ADC

16nm ADC chip

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60GHz 8-way phased array TRX front-end chip

These results are presented at ITF Southeast Asia (Sept 6, Singapore), one of imec’s leading high-tech events, offering an exclusive research and innovation perspective on the emerging opportunities of nanoelectronics and digital technologies. Under the theme “Tech solutions for a smart world”, imec presents innovations on hardware and software innovations that drive a smart society.

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