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Navitas Completes Claros Acquisition to Expand AI Data-Centre Power Portfolio

The transaction adds integrated-voltage-regulator and vertical-power-delivery technology to Navitas’ GaN and SiC power-semiconductor portfolio.
Navitas Semiconductor has completed its acquisition of Claros, a developer of integrated voltage-regulator and vertical-power-delivery technology for high-performance computing and AI infrastructure.
The transaction follows the definitive agreement announced in August and brings Claros’ technology into Navitas’ portfolio of gallium-nitride and silicon-carbide power devices.
Claros focuses on the final stages of power conversion near high-current processors. As AI processors and accelerators increase in power demand, the delivery of stable low-voltage power to the package and core has become an important design challenge. Moving conversion stages closer to the processor can reduce distribution losses and improve the response to rapid changes in current demand.
Navitas positions the acquisition as an expansion from grid and high-voltage conversion through to processor-level power delivery. The company already supplies GaN devices for high-frequency power conversion and SiC technology for high-voltage applications in data centres, energy infrastructure and industrial systems.
Integrated voltage regulation is becoming increasingly relevant in AI data centres, where the power architecture must serve processors that operate at low voltages but draw exceptionally high currents. Power losses, thermal behaviour, routing and package design can all influence the available computing density of a server or rack.
The acquisition also adds engineering capabilities in digital control, passive integration, mixed-signal design and advanced 2D and 3D packaging. These disciplines are becoming more closely connected as data-centre power systems move from large central conversion stages toward more distributed and package-aware power delivery.
Navitas said the combined technology portfolio is intended to address power conversion from the grid to the xPU, covering the successive stages that feed AI and high-performance computing systems.


Image credit: Navitas Semiconductor / Claros

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