Xilinx Introduces HDMI 2.1 IP Subsystem

Customers are increasingly adopting machine learning to monetize and improve workflows in diverse applications such as broadcast, pro AV, automotive and surveillance. HDMI 2.1 data rates are provided by Xilinx’s highly reliable high-speed I/O transceivers. This, combined with native 8K interfaces supported by HDMI 2.1 now make it possible to replace several ASSP’s or fixed-function products support processing, compression, high-quality analytics and decision-making with a single Xilinx device.

“Today’s professional AV and broadcast markets continue to demand higher resolution, higher frame rates and high dynamic range, to deliver more immersive viewing experiences,” said Ramesh Iyer, director of marketing, Pro AV and Broadcast market, Xilinx. “Our customers can now implement the complete HDMI 2.1 interface on-chip, creating highly-integrated designs that can natively handle 8K processing. And customers can combine this functionality with 8K lightweight mezzanine codecs for 8K over IP streaming, reducing real-estate, power consumption and BOM costs.”

Xilinx will demonstrate the HDMI 2.1 IP subsystem alongside a range of other cores for compression, video processing and digital-signage analytics at booth 15-D240, ISE Integrated Systems Europe, RAI Amsterdam, February 5-8.