Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced the Xcelium™ Parallel Simulator, the industry’s first production-ready third generation simulator. It is based on innovative multi-core parallel computing technology, enabling systems-on-chip (SoCs) to get to market faster. On average, customers can achieve 2X improved single-core performance and more than 5X improved multi-core performance versus previous generation Cadence simulators. The Cadence® Xcelium simulator is production proven, having been deployed to early adopters across mobile, graphics, server, consumer, internet of things (IoT) and automotive projects. For more information on the Xcelium simulator, please visit www.cadence.com/go/xcelium.
“The ability for ARM and our partners to deliver products to customers’ expectations is inexorably bound to rapid and rigorous verification,” said Hobson Bullman, general manager, Technology Services Group at ARM. “The Xcelium Parallel Simulator has demonstrated a 4X speed-up for gate-level simulation and 5X for RTL simulation on ARM®-based SoC designs. Based on these results, we expect Xcelium can enhance our ability to deliver the most complex SoCs in a fast and highly reliable way.”
“Fast, scalable simulation is key for us to meet the tight development schedules of our complex 28nm FD-SOI SoCs and ASICs for smart driving and industrial IoT,” said Francois Oswald, CPU team manager at STMicroelectronics. “We measured 8X faster serial-mode DFT performance with the Cadence Xcelium Parallel Simulator, and therefore selected it as the standard simulation solution for our digital and mixed-signal SoC verification teams.”
The Xcelium simulator offers the following benefits aimed at accelerating system development:
“Verification is often the primary cost and schedule challenge associated with getting new, high-quality products to market,” said Dr. Anirudh Devgan, senior vice president and general manager of the Digital & Signoff Group and the System & Verification Group at Cadence. “The Xcelium simulator combined with JasperGold® Apps, the Palladium® Z1 Enterprise Emulation Platform and the Protium™ S1 FPGA-Based Prototyping Platform offer customers the strongest verification suite on the market, enabling engineers to accelerate the pace of innovation.”
The new Xcelium simulator further extends the innovation within the Cadence Verification Suite and supports the company’s System Design Enablement (SDE) strategy, which enables system and semiconductor companies to create complete, differentiated end products more efficiently. The Verification Suite is comprised of best-in-class core engines, verification fabric technologies and solutions that increase design quality and throughput, fulfilling verification requirements for a wide variety of applications and vertical segments.
In related news, Cadence also announced the delivery of another Verification Suite engine today, the Protium S1 FPGA-Based Prototyping Platform, which reduces prototyping time by up to 50 percent. For more information on the Protium platform, please visit www.cadence.com/go/protium-s1.
Entitle is a pioneering privilege management solution that discovers, manages, and automates just-in-time (JIT) access and modern identity governance and…
Available freely to Samtec customers under NDA, SIBORG (Signal Integrity Breakout Region Guru) works with Ansys HFSS 3D Layout to…
Entire NR1 system purpose-built for a more affordable AI infrastructure allowing for faster deployment; furthering AI’s reach into more parts…
Following rapid growth in its customer base to over 400, funding will fuel further AI development and create a hybrid…
The addition of EA’s high-efficiency regenerative power supplies greatly expands Tektronix’s trusted offering Tektronix, Inc, a leading provider in test…
Melexis reveals its groundbreaking Induxis® switch, the MLX92442. Contactless, magnet-free, and strayfield immune, this monolithic solution directly detects conductive targets.…