Microsemi Announces New Addition to its Imaging/Video Solution to Support Growing Demand for MIPI CSI-2 Interfaces

Enhancements Enable Customers to Use Company’s Low Power, Highly Secure IGLOO2 FPGAs and SmartFusion2 SoC FPGAs in CSI-2-Based Camera Systems

ALISO VIEJO, Calif.—Sept. 13, 2016—Microsemi Corporation (Nasdaq: MSCC), a leading provider of semiconductor solutions differentiated by power, security, reliability and performance, today announced a new addition to its imaging/video solution supporting the popular Mobile Industry Processor Interface (MIPI) camera serial interface (CSI-2). The new enhancements enable customers to use the company’s low power, highly secure IGLOO™2 field programmable gate array (FPGA) and SmartFusion™2 system-on-chip (SoC) FPGA capabilities in CSI-2-based camera systems.

“This new addition to our imaging/video solution allows us to expand our customer base amongst those who design CSI-2 cameras, and allows customers to use our lowest power FPGAs in their designs, enabling significant benefits such as the use of smaller batteries and lower system costs,” said Ted Marena, director of SoC FPGA marketing at Microsemi. “Also customers who are concerned about their intellectual property (IP) can now use the most secure FPGAs to protect their IP.”

This new CSI-2 offering from Microsemi includes a CSI-2 interface and reference design. As use of the MIPI CSI-2 standard continues to expand within numerous types of image sensors, this reference design extends Microsemi’s ability  to cater to the market’s increasing opportunities. Designs can be easily reused across multiple platforms using Libero SoC Design Suite, a comprehensive, easy to learn, easy to adopt development toolset for designing with Microsemi’s power efficient FPGAs and SoC FPGAs.

“We have seen significant growth in MIPI CSI-2 cameras and this growth is not limited to mobile consumer devices, but for numerous other applications. The broad market is leveraging the quality of MIPI CSI-2 image sensors for medical, machine vision, surveillance, drones, heads up displays and more,” said Joel Huloux, chairman of the board of MIPI Alliance. “Devices such as Microsemi’s FPGAs which interface to the MIPI CSI-2 will be attractive to a wide application space where low power, attractive performance and security are important.”

In addition to speeding the adoption of Microsemi FPGAs and SoCs in CSI-2 camera designs, the new solution adds to the company’s growing portfolio of solutions for video and imaging applications which are differentiated from competitors with the company’s expertise in low power, reliability and design/data security. Designers can leverage the solution for numerous applications across medical, industrial, aviation and prosumer markets, including thermal imaging cameras, machine vision cameras, medical cameras, hand-held displays, drones and detection cameras.

Microsemi’s MIPI CSI-2 imaging/video solution includes an example reference design for MIPI CSI-2 and a detailed app note is also included with the solution. Designs can be easily reused across multiple platforms using the company’s Libero SoC Design Suite, a comprehensive, easy to learn, easy to adopt development toolset for designing with Microsemi’s power efficient FPGAs and SoC FPGAs.

Product Availability
Microsemi’s imaging/video IP suite is available now in the company’s Libero SoC IP vault. For more information, visit https://www.microsemi.com/products/fpga-soc/imaging and https://www.microsemi.com/products/fpga-soc/imaging#getting-started or contact sales.support@microsemi.com.

MIPI DevCon Paper Presentation from Microsemi Sept. 14
Marena will present his expertise on using FPGAs in applications which require multiple MIPI CSI-2 cameras at the MIPI Alliance Developers Conference 2016 (MIPI DevCon 2016), an industry event specifically designed to provide the latest information on MIPI specifications for implementation in mobile and beyond. Marena’s presentation, “Multi CSI-2 Camera Aggregation in FPGAs,” will take place on Wednesday, Sept. 14 at 3:45 p.m. PDT at the Computer History Museum in Mountain View, California and is open to all pre-registered conference attendees.