Design an optimized circuit for HART-enabled 4- to 20-mA inputs

The advantages over traditional circuits include less board space and lower cost.

The highway addressable remote transducer (HART) protocol allows for bi-directional 1.2/2.2-kHz frequency shift keying (FSK) modulated digital communication over traditional analog 4- to 20-mA current loops. This allows for interrogation of the sensor/actuator, and provides significant advantages during equipment installation, monitoring and maintenance. HART provides benefits to maintenance crews using a portable secondary device to interrogate the sensor/actuator. But to fully realize all the benefits HART can bring, the sensor/actuator must be connected to a control system with HART enabled current inputs or outputs.

Let’s focus on the HART FSK transmit circuitry. Figure 1 shows a traditional approach. Rsense converts the 4- to 20-mA signal to a 1- to 5-V signal to be read by an ADC. The HART FSK transmit circuitry AC couples ±500-mV HART FSK signals to the 4- to 20-mA loop via C1. These signals are either sinusoidal or trapezoidal waveforms.

A good buffer with enough drive strength is required at the HART modem’s output as the Rsense represents a low impedance and there may also be significant capacitance on the current loop cabling. When the HART isn’t transmitting, the buffer output would present a low impedance to the loop which could compromise the 4- to 20-mA signaling. For this reason the switch, SW1, is used in series with the buffer output to provide a high impedance when not transmitting.

The 4- to 20-mA loop can swing between 1 and 5 V while SW1 is open. As this change is AC coupled to SW1, the switch could see up to ±4 V at its input. Hence, a bi-polar supply of ±5 V or more would be required for the switch, or alternately an opto-switch could be used. A tri-state buffer is another option, though again this buffer would require bi-polar supplies. Another option is to use transformer isolation. Given the HART signal frequencies, an audio transformer would be required which is likely to be bulky and consume a large amount of board area.

Figure 2 shows an improved HART FSK transmit circuitry design, which reduces space and cost. In this circuit, the AD5700 HART modem has enough drive strength to drive the ±500 mV FSK signals directly onto the current loop without the need for an external buffer. When the modem isn’t transmitting, the AD5700’s FSK output is biased to 0.75V with a 70-kΩ impedance. R2, R3 provide a stronger 0.75-V bias, with AC impedance of R2||R3 = 1.7 kΩ. The high-pass filter formed by the this 1.7 kΩ and C1 ensures that the worst case 4- to 20-mA input signal, which is ±16 mA at 25 Hz across the 200-Ω Rsense, only results in the HART modems FSK output being drive to between 0 and 1.5 V. This means that the whole input can be run from unipolar supplies as low as 1.62 V (the minimum supply for the HART modem).

Another consideration is the input impedance, which should be greater than 230 Ω. The 250-Ω input resistor is split into 50 and 200 Ω to ensure a large enough input impedance. The AC input impedance is R1 + (Rsense || R2 || R3) ≈ 230 Ω. If needed, this impedance can be increased by raising the values of the 0.75 bias resistors, R2 and R3. The additional 50 Ω in the FSK transmit path will attenuate the FSK signals somewhat, but the voltages will still meet the HART spec requirements.

As the current loop is slewing, there will be some current flow through C1, R2, R3. Ensure that this won’t significantly affect the 4- to 20-mA analog signal. Considering < 0.1% as an acceptable error contribution equates to seven time constants (τ). So 7τ = 7*R*C = 7*(R2||R3)*C1 = 30 ms. The 4- to 20-mA analog signaling is limited to 25 Hz, which corresponds to a 40-ms period. As this is longer than seven time constants, the additional current measurement error will always be < 0.1 percent.

This improved circuit (in Figure 2) has eliminated the need for a buffer and a switch, as well as the need for a bi-polar power supply. These three factors provide significant space and cost savings for a system over the traditional HART FSK transmit circuitry.

Circuitry for the HART FSK input is shown in Figure 3, where a bandpass filter rejects the low-frequency analog signaling and provides immunity from higher frequency interferers. The filter shown is specifically tailored for the AD5700 and will vary for different HART modems. One feature of this bandpass filter is the 150-kΩ input impedance provided by R1, which provides an inherent high level of protection from transient events.

Circuitry for the 4- to 20-mA current measurement is shown in Figure 4. The 200-Ω precision Rsense resistor converts the 4- to 20-mA signals to a 0.8- to 4-V signal to be converted by the ADC. This is followed by a double poll low-pass filter R2, C1, R3, C2 to reject the HART FSK signals. This signal is then fed to an ADC for conversion.

Derrick Hartmann is a system applications engineer in the Industrial Automation group at Analog Devices, based in Wilmington, MA. Prior to his current role, Derrick was a product applications engineer supporting Analog Devices industrial DAC portfolio. Derrick holds a degree in electronic engineering from the University of Limerick, Ireland.

Michal Brychta is senior staff system applications engineer with focus on industrial automation. He also works for Analog Devices’ Industrial Automation group, and is based in Limerick, Ireland. Michal holds Master’s degree in electronic engineering from Technical University in Brno, Czech Republic.